Register Organisation

Introduction

• In computer architecture, a processor register is a very fast computer memory used to speed up the execution of computer programs by providing quick access to commonly used values.
• A register is a word of internal/CPU memory like the accumulator.
• Most early machines used stack or accumulator type of architectures to manipulate data but these days all CPUs made are of GPR.
• The number and the nature of registers is a key factor that differentiates among computers.

Definition

• A register is the smallest (in size), costliest (in price), and fastest (in processing speed)memory, found in the ALU/CU of a computer, used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU/processor.

Features

• A register is also called ‘CPU/Processor/Internal Memory’.
• Registers are typically addressed by mechanisms other than main memory.
• They are volatile memories.
• They are normally at the top of the memory hierarchy, and provide the fastest way to access data.
• They store a small amount of data, normally 1 to 2 bytes per register but in some cases, it may store 4-8 bytes or even more.
• CPU can access registers faster than the main memory.
• Registers are easier for a compiler to use but tend to use a small number of registers because large numbers of registers are very difficult to use effectively. A general good number of registers is 32 in a general machine.
• Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only.
• Registers are typically addressed by mechanisms other than main memory.
• A processor register may hold an instruction, a storage address, or any data (such as a bit sequence or individual characters).
• The computer needs processor registers for manipulating data and a register for holding a memory address.
• One of the basic issues with register design is the number of general-purpose registers or data and address registers to be provided in a microprocessor. In general, it has been found that the optimum number of registers in a CPU is in the range of 16 to 32. In case registers fall below the range then more memory reference per instruction on an average will be needed, as some of the intermediate results then have to be stored in the memory. On the other hand, if the number of registers goes above 32, then there is no appreciable reduction in memory references. The increased number of memory references results in slower execution of a program.
• For addressing a register, depending on the number of addressable registers a few bit addresses are needed in an instruction. These address bits are quite less in comparison to a memory address. For example, for addressing 256 registers we need 8 bits, whereas, the common memory size of 1MB requires 20 address bits, i.e. a difference of 60%.
• The instruction execution is performed in the CPU registers.
• It is the temporary storage location in the CPU for program execution.
• Normally, the length of a register is dependent on its use. For example, a register, which is used to calculate addresses, must be long enough to hold the maximum possible addresses. In certain cases, two consecutive registers may be used to carry data whose length is double the register length.

Types of CPU/Processor Register

There are various types of Registers located inside the Processor/CPU which are used for various purposes i.e. to store some data/addresses/instructions temporarily but in binary form. These are – 

(A) Basic/Fundamental Registers :

These registers are normally present in the computer and perform very important basic functions. These are –

• Accumulator Register (AC):

  • This is the most frequently used register used to store data taken from main memory.
  • An accumulator is a specially designated register that supplies one instruction operand and receives the result. The instructions in such machines are normally one-address instructions.
  • This register is used to store data temporarily for computation by ALU.
  • AC is considered to contain one of the operands.
  • It is a general-purpose processing register.
  • The result after computation by ALU is also stored back to this AC.
  • It is present in different numbers in different microprocessors.
  • Pros :
    • Implicit use of accumulator saves instruction bits.
    • The result is ready for immediate reuse but has to be saved in memory if the next computation does not use it right away.
    • More memory accesses are required than stack
  • On an Accumulator machine C = A + B operation might be implemented as:-

LOAD A   (Load memory location A into accumulator)
ADD B    (Add memory location B to accumulator)
STORE C (Store accumulator value into memory location C)

• • On an Accumulator machine  A = B * C + D * E  operation might be implemented as:-

LOAD B (Load B in AC) MULT C (Multiply AC with C in AC) STORE T (Store B×C into Temporary T) LOAD D (Load D in AC) MULT E (Multiply E in AC) ADD T (B×C + D×E) STORE A (Store Result in A)

• Memory Address Registers (MAR):

  • It holds the address of the memory location from which data or instruction is to be accessed/fetched (read operation) or to which the data is to be stored (write operation).
  • Memory-address register (MAR) holds the address of the next memory operation (load or store).

• Memory Buffer Registers (MBR):

  • It is a register, which contains the data to be written in the memory (write operation) or it receives the data from the memory (read operation).
  • Memory-buffer register (MBR) holds the content of memory operation (load or store).

• Program Counter (PC):

  • It is a register that contains the memory address of the next instruction to be executed/ fetched. PC points to the address of the next instruction to be fetched from the main memory when the previous instruction has been completed.
  • It keeps track of the instruction that is to be executed next, that is, after the execution of an ongoing instruction.
  • Program Counter (PC) is used to keep track of the execution of the program.
  • Program Counter (PC) also functions to count the number of instructions.

• Instruction Register (IR):

  • A special register that holds the instruction(s) currently being executed.
  • The instruction read from memory is placed in the Instruction register (IR) which is currently been executed.

(B) Data Registers/User or Programmer Visible Registers :

• These registers are used to store temporary data items and other user-accessible information useful for machine or assembly language programmers.
• In other words, these registers can be used by machine or assembly language programmers to minimize the references to main memory.
• These registers can be accessed using machine language by the programmer hence called Programmer visible Registers.
• Data registers are fundamental components of a CPU’s architecture, enabling efficient data handling and processing.
• Understanding the various types of data registers and their specific uses is essential for low-level programming and optimizing performance in software development.
• In computer architecture, data registers are used to store intermediate values, operands, or results of operations within the CPU.
• These registers facilitate fast access to data during computation, which helps in speeding up the processing tasks.
• Each type of data register has a distinct role, contributing to the overall functionality and efficiency of the CPU.
• Data registers can be of various types, each serving specific purposes depending on the architecture and the specific requirements of the operations being performed. Hence, on this basis, data registers can be categorized into –

(I) General Purpose Register (GPR)

• • • These are the most common types of data registers and are used for a variety of purposes, including arithmetic operations, data manipulation, and temporary storage.
    • The number and size of general-purpose registers vary between different CPU architectures.
    • The general-purpose registers as the name suggests, is the collection of different types of data registers which can be used for various functions. For example, they may contain operands or can be used for the calculation of the address of an operand, etc.
    • These registers can be used for anything either holding operands for operations or temporary intermediate values.
    • The dominant architectures are IBM 370, PDP-11 and all Reduced Instant Set Computer (RISC) machines, etc. possess this register.
    • This register can be used to store variables as it reduces memory traffic and speeds up execution.
    • It also improves code density.
    • Memory access can be minimized (registers can hold lots of intermediate values) using this register.
    • It has a larger instruction size than accumulator-type machines.
    • Implementation is complicated, as the compiler writer has to attempt to maximize register usage.
    • Instructions in GPR  data registers are of varying lengths from 1 byte to 6-8 bytes. This causes problems with the pre-fetching and pipelining of instructions.
    • There are four 16-bit GPR Data registers: AX (Accumulator Register), BX (Base Register), CX (Counter Register), and DX(Data Register). Each of these 16-bit data registers is further subdivided into 8-bit registers of Higher and Lower bits. Thus, GPR `Data Registers are of the following types –
      • AX(Accumulator) :
        • It consists of two 8-bit registers AL and AH, which can be combined and used as a 16-bit register AX.
        • Here, AL is the low-order byte of the word, and AH contains the high-order byte.
        • An accumulator can be used for I/O operations and string manipulation.
      • BX (Base register) :
        • It also consists of two 8-bit registers BL and BH, which can be combined and used as a 16-bit register BX.
        • Here, BL is the low-order byte of the word, and BH contains the high-order byte.
        • BX register usually contains an offset value for the data segment.
      • CX (Counter register) :
        • It also consists of two 8-bit registers CL and CH, which can be combined and used as a 16-bit register CX.
        • Here, CL is the low-order byte of the word, and CH contains the high-order byte.
        • Count register can be used in Loop, shift/rotate instructions, and as a counter in string manipulation.
      • DX (Data register) :
        • It also consists of two 8-bit registers DL and DH, which can be combined and used as a 16-bit register DX.
        • Here, DL is the low-order byte of the word, and DH contains the high-order byte.
        • DX can be used as a port number in I/O operations.
        • In integer 32-bit multiply and divide instruction the DX register contains high-order words of the initial or resulting number.

(II) Special Purpose Register (SPR) 

• • • These registers are dedicated registers and are used in specific operations.
    • These are –

    • Segment Register :

      • Segment registers are fundamental components of the x86 architecture’s memory management system.
      • Segment registers are used to manage segmented memory architecture, holding the base addresses of segments.
      • They allow the CPU to manage and access different areas of memory efficiently, supporting both simple and complex memory models.
      • Understanding segment registers and their usage is essential for low-level programming and systems development on x86-based platforms.
      • Segment registers are specialized registers in certain CPU architectures, particularly in the x86 architecture, used to hold segment selectors that allow a processor to address more memory than the size of its address bus would normally permit. 
      • A segment register contains the addresses of instructions and data in memory which are used by the processor to access memory locations.
      • It indicates the starting address of a memory segment currently being used.
      • Segment Register may be of the following types: –
        • Code segment (CS):
          • This is a 16-bit register containing an address of 64 KB segment with processor instructions.
          • CS points to the segment containing the executable instructions.
          • When the CPU fetches an instruction to execute, it combines the value in CS with the instruction pointer (IP) to form the physical address.
          • CS is used during instruction fetches to determine the location of the executable code.
          • The code segment holds the instruction codes of a program.
        • Stack Segment (SS):
          • This is a 16-bit register containing an address of 64KB segment with a program stack.
          • SS points to the segment containing the stack.
          • By default, the processor assumes that all data referenced by the stack pointer (SP) and base pointer (BP) registers is located in the stack segment.
          • The stack segment holds the addresses and data of subroutines.
          • It also holds the contents of registers and memory locations given in PUSH instruction.
          • SS is used during stack operations, such as push, pop, call, return, and for accessing function parameters and local variables.
          • SS is also used when accessing stack-based variables.
          • The CPU uses SS and the stack pointer (SP) to determine the address for stack operations.
          • SS register can be changed directly using POP instruction.
        • Data Segment(DS):
          • This is a 16-bit register containing an address of 64KB segment with program data.
          • DS points to the segment containing general data used by the program.
          • By default, the processor assumes that all data referenced by general registers (AX, BX, CX, and DX) and index registers (SI, DI) is located in the data segment.
          • The data, variables, and constants given in the program are held in the data segment of the memory. In other words, accessing data, variables, and constants stored in memory typically uses the DS register.
          • DS is used for most data accesses unless overridden by another segment register.
        • Extra segment(ES):
          • An extra segment(ES) is a 16-bit register containing the address of a 64KB segment with an additional data segment of program data.
          • By default, the processor assumes that all data referenced by general registers (AX, BX, CX, and DX) and index registers (SI, DI) is located in the Extra segment.
          • The extra segment holds the destination addresses of some data of certain string instructions.
          • ES provides additional segment registers for more flexible memory access.
          • ES is often used for specific purposes, such as handling different segments of data, facilitating complex data structures, or implementing thread-local storage.
          • ES is specifically used in string instructions (e.g., MOVSB, MOVSW) to specify the destination segment.
          • The other extra segment register called FS can be used to access thread-specific data in multithreaded applications.
          • The other extra segment register called GS can be used by some operating systems for specific purposes, such as accessing processor control structures.

    • Address/Pointer Register :

• • • • Address registers, also known as pointer registers, are special-purpose registers used in a CPU to store memory addresses.
      • Address or pointer registers are indispensable in modern CPU architectures, facilitating efficient memory access, flexible addressing, and streamlined code execution.
      • They are integral to the performance and functionality of computer systems, enabling complex operations to be carried out swiftly and efficiently.
      • Understanding these registers is essential for low-level programming, system design, and computer architecture.
      • These registers are essential for efficient data manipulation and access, as they allow the processor to quickly locate and retrieve data from memory.
      • Address registers play a crucial role in various addressing modes and are vital for operations involving memory access, such as reading from or writing to memory.
      • This is also a dedicated register i.e. the address registers are used only for storing the address of the operand.
      • Address registers support various addressing modes, enhancing the versatility of instruction sets and allowing more compact and efficient code. It normally uses direct addressing, Indirect addressing, Indexed addressing, Base-Indexed addressing, Register Indirect, Relative addressing modes, etc.
      • Address registers enable quick access to memory locations, reducing the need to repeatedly fetch addresses from memory.
      • The address register is crucial for stack operations, including function calls and returns, interrupt handling and local variable storage.
      • Address register allows efficient iteration through data structures like arrays, tables, and linked lists by manipulating address values.
      • Some dedicated address registers are: –
        1. Segment Pointer/Register :
           • Used to point out or store the address of a segment of memory.
           • Used in segmented memory models.
           • Examples include CS (Code Segment), DS (Data Segment), SS (Stack Segment), and ES (Extra Segment).
        2. Index Register :
           • These are used for index addressing schemes.
           • It typically stores an offset value that can be added to a base address to access an exact location in an array or a list of data.
           • This register may be –
           • Source Index (SI) Register :
             • This is a 16-bit register used to hold the offset address for DS and ES in case of string manipulation instruction.
             • SI is used for indexed, based indexed, and register indirect addressing, as well as source data addresses in string manipulation instructions.
           • Destination Index (DI) Register :
             • This is a 16-bit register used to hold the offset address for DS and ES in case of string manipulation instruction.
             • DI is used for indexed, based indexed, and register indirect addressing, as well as destination data addresses in string manipulation instructions.
        3. Stack Pointer(SP) :
           • A Stack Pointer (SP) is a 16-bit register used to hold the offset address for the stack segment.
           • Used in stack operations like push and pop, and for maintaining the call stack during function calls and returns.
           • This register points to the top of the stack when the programmer’s visible stack addressing is used.
        4. Base Pointer(BP)/Frame Pointer(FP) :
           • It is a 16-bit register used to hold the offset address for the stack segment. 
           • It points to the base of the current stack frame.
           • This register is used in accessing local variables and function parameters within the stack frame.
           • BP register is usually used in based, indexed, or register indirect addressing.
           • The difference between SP and BP is that the SP is used internally to store the address in case of interruption and the CALL instruction.
        5. Instruction Pointer(IP) :
           • It is a 16-bit register.
           • It holds the address of the next instruction to be executed.
           • It automatically increments after each instruction fetch.
           • This register in the 8086 microprocessor acts as a Program Counter(PC).
           • It is used to hold the offset address for CS.

(C) Flag Registers :

• The Intel 8086 microprocessor has a flag register, which consists of 16 bits (0-15). A flag is a total 16-bit register in which 9 one-bit flags are functional or existing whereas 7 one-bit flags are unused/reserved. Among 9 one-bit existing flags, 3 are Control flag Register and 6 are Status Flag Registers.
• Flag registers play a crucial role in controlling the flow of execution in programs, especially in conditional branching and loops, and in handling errors or exceptional conditions. 
• These registers are mainly used by a control unit to control and coordinate the operations as well as to know/focus on the status of the process.
• It exactly behaves like a flip-flop i.e. it changes states according to the result stored in the accumulator.
• Flag Registers are categorized into –         

(i) Control Flag Registers :

• • These registers are mainly used by a control unit to control and coordinate the operations
  • These registers cannot be used by the programmers but collectively are used to control the various CPU operations or the executions of the program.
  • These registers cannot be used in data manipulation work, however, the content of some of these registers can be used by the programmer.
  • Almost all the CPUs have a control register.
  • Control Flag Registers are – Direction Flag(DF), Interrupt Flag(IF), and Trap Flag(TF).
    • Direction Flag(DF):
      • It occupies a Bit 10 position in the flag register.
      • This flag is used by string manipulation instructions in string operations.
      • It controls the direction of string operations.
      • When set(1), string operations decrement the pointer i.e. auto-decrementing mode; when clear, they increment the pointer i.e., auto-incrementing mode.
      • If this flag bit is ‘0’, the string is processed beginning from the lowest address to the highest address i.e., auto-incrementing mode, otherwise flag bit ‘1’ represents the string is processed from the highest address towards the lowest address, i.e. auto-decrementing mode.
    • Interrupt flag(IF):
      • It occupies the Bit 9 position in the flag register.
      • This flag enables or disables the processing of maskable interrupts. When set, interrupts are enabled.
      • If this flag is set, the maskable interrupts are recognized by the CPU. Otherwise, they are ignored. 
    • Trap Flag(TF):
      • It occupies the Bit 8 position in the flag register.
      • A trap interrupt is generated after the execution of each instruction. The processor executes the current instruction and the control is transferred to the Trap interrupt service routine.
      • If this flag is set, the processor enters the single-step mode of execution/ debugging.
      • When set, the processor generates a debug exception after each instruction.

(ii) Status/Conditional Flag Registers :

• • The flag register is often known as Program Status Word (PSW).
  • It contains the condition code plus other status information.
  • Almost all the CPUs have a status register, a part of which may be programmer visible.
  • This register shows the processing status of a current process and stores only a single bit value(0/1) at a time to display the status.
  • The flag values are set/unset by the CPU hardware while operating. For example, an addition operation may set the overflow flag, or on a division by 0 the overflow flag can be set, etc.
  • Processor status bits indicate the current status of the processor. Sometimes it is combined with the other processor status bits and is called the program status word (PSW).
  • Understanding the status flags is essential for low-level programming and debugging.
  • It is a register that may be formed by condition codes is called a condition code register.
  • Types of Status Flag Registers: Some of the commonly used flags or condition codes in such a register may be:-
    
    • Auxiliary flag(AF)/Adjust Flag
      • It occupies the Bit 4 position in the flag register.
      • Set(1): When there is a carry-out or borrow from the lower nibble/bits from 0-3 in the AL register (i.e., the lowest 4 bits) in binary-coded decimal (BCD) operations.
      • Clear(0): When there is no such carry.
      • Usage: Primarily used in BCD arithmetic operations.
    • Carry flag(CF)
      • It occupies the Bit 0 position in the flag register.
      • This flag will be –
        • Set: When an arithmetic operation generates a carry-out bit of the most significant/highest order bit (for addition) or a borrow into the most important bit (for subtraction).
        • Clear: When there is no carry or borrow.
        • Usage: Important in multi-byte arithmetic operations and in detecting overflow in unsigned arithmetic.
    • Parity flag(PF)
      • It occupies the Bit 2 position in the flag register.
      • Set: When the parity value (the number of set bits “1” bits) of the result is even.
      • Clear: When the number of set bits is odd.
      • Usage: Often used in error detection and communication protocols.
    • Overflow Flag(OF)
      • It occupies the Bit 11 position in the flag register.
      • This flag is used to indicate the condition of arithmetic overflow, if any during the operation.
      • Set: When an arithmetic operation causes a signed overflow, meaning the result is too large to be represented in the given number of bits.
      • Clear: When there is no signed overflow.
      • Usage: Critical in detecting errors in signed arithmetic operations.
    • Sign flag(SF)/Negative Flag(NF)

• • • • It occupies the Bit 7 position in the flag register.
      • This flag indicates whether the sign of the previous arithmetic operation was positive (by storing 0) or negative (by storing 1).
      • It indicates the sign of the result of an operation.
      • A set SF means the result is negative.
      • Set: When the result of an operation is negative (the most significant bit of the result is 1).
      • Clear: When the result of an operation is non-negative (the most significant bit of the result is 0).
      • Usage: Useful in signed arithmetic operations and comparisons.

• • • Zero flag(ZF)
      • It occupies the Bit 6 position in the flag register.
      • This flag bit will be –
        • Set: When the result of the last arithmetic operation is zero.
        • Clear: When the result of an operation is non-zero.
        • Usage: Often used in conditional branching to determine if a specific operation resulted in a zero value.

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• • • Equal flag
      • This flag exists in the latest processor.
      • This flag will be set if a logic comparison operation finds out that both of its operands are equal.
    • Supervisor flag
      • This flag also exists in the latest processor.
      • This flag is used in certain computers to determine whether the CPU is executing in supervisor or user mode. In case the CPU is in supervisor mode it will be allowed to execute certain privileged instructions.

Example of Flag Register Operation

• • Carry Flag (C): Set/1, because there is a carry-out of the 8th bit.
  • Zero Flag (Z): Clear/0, because the result is not zero.
  • Sign Flag (S): Set/1, because the result has the most significant bit set (indicating a negative value in signed arithmetic).
  • Overflow Flag (O): Clear/0, because the signed result did not overflow.
  • Parity Flag (P): Clear, because the number of 1s in the result (1001 1110) is odd (5 ones).
  • Auxiliary Carry Flag (A): Set, because there is a carry from the lower nibble (the lower 4 bits: 0101 + 1001 results in a carry out from the lower nibble).